| Methods Summary |
|---|
| public int | codeSize(){@inheritDoc}
return 1;
|
| public java.util.BitSet | compatibleRegs(com.android.dx.dex.code.DalvInsn insn){@inheritDoc}
RegisterSpecList regs = insn.getRegisters();
BitSet bits = new BitSet(2);
int r0 = regs.get(0).getReg();
int r1 = regs.get(1).getReg();
switch (regs.size()) {
case 2: {
bits.set(0, unsignedFitsInNibble(r0));
bits.set(1, unsignedFitsInNibble(r1));
break;
}
case 3: {
if (r0 != r1) {
bits.set(0, false);
bits.set(1, false);
} else {
boolean dstRegComp = unsignedFitsInNibble(r1);
bits.set(0, dstRegComp);
bits.set(1, dstRegComp);
}
bits.set(2, unsignedFitsInNibble(regs.get(2).getReg()));
break;
}
default: {
throw new AssertionError();
}
}
return bits;
|
| public java.lang.String | insnArgString(com.android.dx.dex.code.DalvInsn insn){@inheritDoc}
RegisterSpecList regs = insn.getRegisters();
int sz = regs.size();
/*
* The (sz - 2) and (sz - 1) below makes this code work for
* both the two- and three-register ops. (See "case 3" in
* isCompatible(), below.)
*/
return regs.get(sz - 2).regString() + ", " +
regs.get(sz - 1).regString();
|
| public java.lang.String | insnCommentString(com.android.dx.dex.code.DalvInsn insn, boolean noteIndices){@inheritDoc}
// This format has no comment.
return "";
|
| public boolean | isCompatible(com.android.dx.dex.code.DalvInsn insn){@inheritDoc}
if (!(insn instanceof SimpleInsn)) {
return false;
}
RegisterSpecList regs = insn.getRegisters();
RegisterSpec rs1;
RegisterSpec rs2;
switch (regs.size()) {
case 2: {
rs1 = regs.get(0);
rs2 = regs.get(1);
break;
}
case 3: {
/*
* This format is allowed for ops that are effectively
* 3-arg but where the first two args are identical.
*/
rs1 = regs.get(1);
rs2 = regs.get(2);
if (rs1.getReg() != regs.get(0).getReg()) {
return false;
}
break;
}
default: {
return false;
}
}
return unsignedFitsInNibble(rs1.getReg()) &&
unsignedFitsInNibble(rs2.getReg());
|
| public void | writeTo(com.android.dx.util.AnnotatedOutput out, com.android.dx.dex.code.DalvInsn insn){@inheritDoc}
RegisterSpecList regs = insn.getRegisters();
int sz = regs.size();
/*
* The (sz - 2) and (sz - 1) below makes this code work for
* both the two- and three-register ops. (See "case 3" in
* isCompatible(), above.)
*/
write(out, opcodeUnit(insn,
makeByte(regs.get(sz - 2).getReg(),
regs.get(sz - 1).getReg())));
|
